This has only one input called as D. Basically it is derived from J-K flip-flop, where J and K are combined together as shown in the diagram below...
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|
Input Dn |
Output Qn+1 |
| 0 | 0 |
| 1 | 1 |
In D flip-flop the input data at D appears at the output only after next clock edge (-ve edge). Thus the transfer of the data from the input to the output is delayed by one clock, hence the name delay(D) Flip-flop. The D-type flip-flops are very much used in delay-chains for pipe-line adjustments.